Direct Memory Access MCQ Set-3

1. The DMA differs from the interrupt mode by
a) The involvement of the processor for the operation
b) The method accessing the I/O devices
c) The amount of data transfer possible
d) Both a and c


2. The DMA transfers are performed by a control circuit called as
a) Device interface
b) DMA controller
c) Data controller
d) Overlooker


3. In DMA transfers, the required signals and addresses are given by the
a) Processor
b) Device drivers
c) DMA controllers
d) The program itself


4. After the complition of the DMA transfer the processor is notified by
a) Acknowledge signal
b) Interrupt signal
c) WMFC signal
d) None of the above


5. The DMA controller has _______ registers
a) 4
b) 2
c) 3
d) 1


6. When the R/W bit of the status register of the DMA controller is set to 1,
a) Read operation is performed
b) Write operation is performed


7. The controller is connected to the ____
a) Processor BUS
b) System BUS
c) External BUS
d) None of the above


8. Can a single DMA controller perform operations on two different disks simulteneously…??
a) True
b) False


9. The techinique whereby the DMA controller steals the access cycles of the processor to operate is called
a) Fast conning
b) Memory Con
c) Cycle stealing
d) Memory stealing


10. The technique where the controller is given complete access to main memory is
a) Cycle stealing
b) Memory stealing
c) Memory Con
d) Burst mode


11. The controller uses _____ to help with the transfers when handling network interfaces.
a) Input Buffer storage
b) Signal echancers
c) Bridge circuits
d) All of the above


12. To overcome the conflict over the possession of the BUS we use ______
a) Optimizers
b) BUS arbitrators
c) Multiple BUS structure
d) None of the above


13. The registers of the controller are ______
a) 64 bits
b) 24 bits
c) 32 bits
d) 16 bits


14. When process requests for a DMA transfer ,
a) Then the process is temporarily suspended
b) The process continues execution
c) Another process gets executed
d) Both a and c


15. The DMA transfer is initiated by _____
a) Processor
b) The process being executed
c) I/O devices
d) OS