Programmable DMA Interface 8237 MCQ Set-1

1. The block of 8237 that decodes the various commands given to the 8237 by the CPU is
a) timing and control block
b) program command control block
c) priority block
d) none of the mentioned


2. The priority between the DMA channels requesting the services can be resolved by
a) timing and control block
b) program command control block
c) priority block
d) none of the mentioned


3. The register that holds the current memory address is
a) current word register
b) current address register
c) base address register
d) command register


4. The register that holds the data byte transfers to be carried out is
a) current word register
b) current address register
c) base address register
d) command register


5. When the count becomes zero in the current word register then
a) input signal is enabled
b) output signal is enabled
c) EOP (end of process) is generated
d) start of process is generated


6. The current address register is programmed by the CPU as
a) bit-wise
b) byte-wise
c) bit-wise and byte-wise
d) none of the mentioned


7. Which of these register’s contents is used for auto-initialization (internally)?
a) current word register
b) current address register
c) base address register
d) command register


8. The register that maintain an original copy of the respective initial current address register and current word register is
a) mode register
b) base address register
c) command register
d) mask register


9. The register that can be automatically incremented or decremented, after each DMA transfer is
a) mask register
b) mode register
c) command register
d) current address register


10. Which of the following is a type of DMA transfer?
a) memory read
b) memory write
c) verify transfer
d) all of the mentioned